For many applications, a product’s success can be defined by its power footprint. A product that is world class in power consumption can lead to world class cost, physical size, thickness,weight, battery life, service life, reliability and the list goes on. These virtues of low power lead to greater customer satisfaction and highly differentiated products in contrast to competitors. Since all customers have access to all of the same IC components from off-the-shelf catalog semiconductor vendors today, it becomes more difficult to differentiate. There are also many applications that may not exist in the absence of ultra low power design including implantable electronics, wearables and energy harvesting devices.

Triad Semiconductor designs and manufactures Reconfigurable Mixed Signal ASIC solutions known as rASICs. An rASIC is a full custom mixed signal ASIC designed to your specification.Your rASIC can be reconfigured with a single mask change using Triad’s panted via-configurable technology. This highly differentiated rASIC approach leads to all the benefits of full-custom mixed signal ASIC performance and unit cost with the added benefit of 50% faster time to market and 70% savings in development costs when compared to traditional ASICs.

Unlike traditional mixed signal ASIC vendors, Triad offers complete IP protection. Your rASIC cannot be copied or cloned by your competitors and your rASIC cannot be purchased by others.This protection is extremely important for new products emerging in an existing marketplace as well as for market leaders to solidify & protect their top position.

There are numerous methods in which power optimization is addressed and endless tradeoffs are involved in the design process. Triad’s focus is on optimizing the total system including both Analog and Digital subsystems and the method in which they interact. These application notes will walk through multiple areas where power tradeoffs can be made throughout the rASIC design process and will conclude with a real life, silicon proven design example.

Begin the Series: ASIC Integration Power Savings →