WLCSP, Wafer Level Chip Scale Packaging, also referred to as Wafer-Level packaging (WLP) or Chip Scale Packaging (CSP) is a technology for packaging an integrated circuit while still part of the wafer. This wafer level processing is in contrast to conventional methods of slicing the wafer into individual circuits (chips, or dice) and then packaging them. WLCSP is truly chip-scale package since the resulting package is the same size as the die. A WLCSP package is composed of the integrated circuit die, a possible redistribute layer (RDL) and solder balls or bumps. The redistribution layer is required to route from peripherally located bond wire pads to a grid array of CSP pad locations. WLCSP can be a good choice for small pin count devices as a way to optimize area and cost.
Triad Semiconductor provides WLCSP package options. Designs can be designed exclusively for WLCSP implementation. Alternatively, the IC can be laid out with bond-wire I/O pads on the periphery of the IC. A redistribution layer can then be applied to the IC to redistribute the CSP ball pads to the desired grid spacing. Triad engineering will work with you determine the most optimal packaging option for your design.