Wafer backgrinding involves thinning semiconductor wafers after IC have been fabricated onto the wafer. Semiconductor wafers go through the IC foundry processing steps on a wafer having a thickness that best supports reliable and high quality processing. In other words, the wafer thickness a wafer is selected by the IC fabricator so as to maximize their yield and profitability. Silicon wafers used in IC processing predominately have diameters of 200mm and 300mm. These wafers are about 700-microns thick ensure mechanical stability and to reduce warping. Many applications require reduced package size. Products like cellphones require packages of reduced height to satisfy the industrial design requirements of the product. Complex solutions in these products often require the integration of memories, ASICs, SoC , MEMs and RFIC components that cannot cost effectively be fabricated as single chip or monolithic solutions. Instead, designers seek to package multiple die in the same package while still maintaining a minimum height of the final package. To achieve minimum package height, wafers containing the different die to be stacked go through a process of wafer backgrinding or wafer thinning. This process is also referred to as wafer backlapping. During the wafer thinning process, wafers are commonly thinned to thicknesses of 75 to 50 microns.
Triad’s semiconductor manufacturing flow supports stacked die or system in package (SiP) solutions. Our design, packaging, operations and quality teams will work with you to create a multi-die packaged solution optimized for yield, reliability, and your profitability. We manage wafer backgrinding, wafer probing, system-in-package assembly and packaged device final test.