RTL is coding style for digital circuits that defines the flow of signals between registers. As such, RTL code is synchronous (signals update on a clock edge) and synthesizable to logic gates. A simplified example of this would be using combinatorial logic equations, if-then statements and case statements to define signal transitions between D flip-flops. RTL is not to be confused with behavioral coding which defines circuit operation, between input and output, at an abstract level and may not be synthesizable to hardware. Since RTL is a style of coding, it does not imply any particular hardware description language, but common languages used for RTL coding are VHDL and Verilog.

Triad has produced re-configurable ASICs that contain anywhere from a handful of logic gates to over a million logic gates. Triad engineers can implement digital circuits from many different types of customer input such as RTL code, behavioral code, or something more abstract like a specification for the circuit operation.