In the evolution of hardware design, at first all circuits were designed with schematic drawings. As designs began to get more complex so did the schematics until the point that they were too complex to comprehend, required to much time to capture and modify. This trend was particularly problematic for digital designs because of the number of interconnects and parallelism in the circuits. As a result hardware description languages (hdl) were create to describe designs at a behavioral level and synthesis was used to translate this behavioral description into a physical netlist. By using HDL, engineers were able to create designs more rapidly and with less errors along the way. Two common HDL languages in use today are VHDL and Verilog. Both Verilog and VHDL have Analog Mixed Signal (AMS) extentions to model analog circuits as well.
Triad engineers make extensive use of HDL in our ASIC development flow. This is both used in digital design as well as for creating behavioral models of analog circuits.