Comparative Analysis of White Space Recovery in Full Custom and Agile ASICs

Competing requirements of cost, schedule and features in a full custom ASIC design

Full Custom ASIC Design Isn’t As Good As It Used to Be

Full Custom is the term used to describe the manual or by hand layout of custom integrated circuits or ICs. In the area of analog or mixed-signal custom IC development, full-custom has historically been the way the majority of custom ICs have been designed. In fact, even with the vast improvements in Electronic Design Automation (EDA) software, mixed-signal IC are laid out by hand just like they were thirty years ago.

Custom ICs Deliver Nice Benefits

  • Optimized semiconductor die size
  • Low production unit cost
  • IP protection – ICs are more difficult to reverse engineer and clone compared to PCB circuits
  • Improved manufacturability
  • Improved reliability
  • Reduced Size, Weight and Power (SWaP)


Real-world Full Custom Development Involves Compromise

In an ideal world, a full custom IC designer would have unlimited time to carefully optimize the size of his design so that the resulting die size and production unit cost would be minimized. Unfortunately, the real world does not afford the designer unlimited or even excess time. Instead, a real full custom ASIC development always comes with at least three strongly competing requirements:

  1. Die Size
  2. Schedule
  3. Features

Designers must balance die size optimization with the need to achieve performance (features) while also releasing the chip on time. This tension between these competing requirements has resulted in full custom design habits that are less than optimal. 


While full custom design may be a good way to optimize a small circuit block, traditional full custom design is prone to wasting space and making change management difficult. In this series, we will explore the inefficiencies inherent to manual, by-hand full-custom IC design. We will compare full custom design to an enhanced custom approach that brings agile design capabilities to custom circuits.

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