Mocha-1 - ARM® Cortex™-M0 Configurable Array
The Mocha™-1 is an ARM Cortex-M0 based, via-configurable array. The Mocha-1 couples the low power, low-cost Cortex-M0 32-bit processor with 75,000 configurable ASIC gates, non-volatile memory, and a rich compliment of configurable analog resources to enable the rapid, low-cost development of complete mixed signal System-on-a-Chip (SoC) solutions.
Processor
- ARM Cortex-M0 32-bit processor
- 25MHz operation
- 32 Kbytes of on-chip EEPROM program memory
- 24 Kbytes of SRAM
- Nested Vectored Interrupt Controller (NVIC)
- Watchdog Timer
- System and Clock Control
- Multiple Power Saving Modes
- Wake-Up Interrupt Controller (WIC)
- Serial Wire Debug
- PLL with Flexible System Clocking Options
- High-Speed GPIO
- APB & AHB Buses exposed to via-configurable digital section
Configurable Digital
- 75,000 ASIC Gates
- 99 Logic Tiles
- 750 Equivalent 2-input NAND gate equivalents per logic tile
- 128 x 16 2-Port SRAM per logic tile ( 2,048 bits)
- 202,752 bytes of distributed 2-Port SRAM
- 173 configurable digital I/O
- Isolated 3.3V digital power and ground
Configurable Analog
- 32+ Op-Amps and Configurable Arrays of Resistors, Capacitors, Transistors & Switches
- 8 Fully-Differential Analog Tiles
- 4 Single-Ended, General Purpose Analog Tiles
- 4 Single-Ended, Low-Noise Analog Tiles
- 4 High-Speed Current-Steering DACs
- Band-Gap and Voltage Reference
- 53 configurable analog I/O
- Isolated 3.3V analog power and ground
