VCA-1

Download PDF
General-purpose array with 40K-ASIC gates, 54-kbits of RAM, 18-kbytes of via-ROM and 30+ op-amps
VCA-1 Analog Resources & I/O:
  • 34 Op-Amps and supporting resources: R, C, Trans, Switch
  • 24 Single-Ended Op-Amps
  • 6 Wideband Op-Amps
  • 4 Low Noise Op-Amps
  • 2 10-bit, 1MSPS DACs
  • 42 Analog I/O
  • 3.3V Isolated Analog Power
  • Digital Logic & I/O:
    • 54 Kbits of 1-Port SRAM
    • 72 Configurable Digital I/O
    • 3.3V Digital Power
  • Logic: 40,500 Gates
Process: AMS 0.35 (C35)Status: Production

VCA-2

Download PDF
High-Voltage array with support for analog up to 50V plus digital and non-volatile memory
VCA-2 Analog Resources & I/O:
  • 20V Analog
  • 12 20V Op-Amps
  • 12 3.3V Op-Amps
  • 6 Power Management Tiles
  • 2 Regulator Tiles
  • 2 10-bit, 1MSPS DACs
  • 42 Analog I/O
  • 3.3V Isolated Analog Power
  • o 20V Isolated Analog Power
  • 20V Analog
  • 12 20V Op-Amps
  • 12 3.3V Op-Amps
  • 6 Power Management Tiles
  • 2 Regulator Tiles
  • 2 10-bit, 1MSPS DACs
  • 42 Analog I/O
  • 3.3V Isolated Analog Power
  • o 20V Isolated Analog Power
  • Digital Logic & I/O:
    • 21 Kbits of 1-Port SRAM
    • 1Kx8 EEPROM, 20-Year Retention
    • 44 Configurable Digital I/O
    • 3.3V Digital Power
  • Logic: 15,750 Gates
Process: AMS 0.35 (H35)Status: Production

VCA-3

 
Small array optimized for cost sensitive sensor interface applications
 
Analog Resources & I/O:
  • 4 general-purpose op-amp tiles
  • 2 fully differential op-amp tiles
  • 3 10-bit DACs, 1uS
  • 1 8-bit ADC, 1-MSPS
  • Digital Logic & I/O:
  • Logic: 16,800 Gates
Process: IBM 0.18(7RF)Status: Planned

VCA-4

Download PDF
Low-power, low-noise array with fully differential analog
VCA-4 Analog Resources & I/O:
  • Low-Power, Low-Noise
  • 3.3V Analog
  • 6 Low Power Fully Differential Analog Tiles
  • 8 Low Power Low Noise Single Ended Analog Tiles
  • 12 Wideband/Low Noise Op-amp Tiles
  • 1 Low Power Bias Generators
  • High Resistance Tile
  • 2 10-bit Digital Potentiometers
  • Temperature Sensor
  • Digital Logic & I/O:
    • 32 Kbits of 1-Port SRAM
    • 4Kx16 EEPROM, 20-Year Retention
    • 48 Configurable Digital I/O
    • 3.3V Digital Power
    • 32KHz to 2MHz PLL
    • 32 Kbits of 1-Port SRAM4Kx16 EEPROM, 20-Year Retention48 Configurable Digital I/O3.3V Digital Power32KHz to 2MHz PLL
  • Logic: 24,000 Gates
Process: AMS 0.35 (E35)Status: Production

VCA-5

Download PDF
High capacity, wideband platform
VCA-5 Analog Resources & I/O:
  • 88 Op-Amps & Resources
  • 3.3V Analog
  • 16 Fully Differential Analog Tiles
  • 20 Single Ended Analog Tiles
  • 12 Wideband/Low Noise Op-amp Tiles
  • 2 Bias Generators
  • 8 10-bit, 1MSPS DACs
  • 2 8-bit, 1MSPS ADCs
  • 10-bit, 25MSPS Pipelined ADC
  • 10 6-bit, 50MSPS Current Steering DACs
  • 2 Programmable Delay Lines
  • 33ns Span, 100ps Steps
  • 73 Analog I/O
  • 3.3V Isolated Analog Power
  • Digital Logic & I/O:
    • 102 Kbits of 1-Port SRAM
    • 32Kx8 EEPROM, 20-Year Retention
    • 60 Configurable Digital I/O
    • 3.3V Digital Power
  • Logic: 76,500 Gates
Process: AMS 0.35 (E35)Status: Silicon Proven

Mocha-1

Download PDF
ARM® Cortex™-M0 Configurable Array
Mocha-1 Analog Resources & I/O:
  • 32+ Op-Amps and Configurable Arrays of Resistors, Capacitors, Transistors & Switches
  • 8 Fully-Differential Analog Tiles
  • 4 Single-Ended, General Purpose Analog Tiles
  • 4 Single-Ended, Low-Noise Analog Tiles
  • 4 High-Speed Current-Steering DACs
  • Band-Gap and Voltage Reference
  • 53 configurable analog I/O
  • Isolated 3.3V analog power and ground
  • Digital Logic & I/O:
    • 99 Logic Tiles
      • 750 Equivalent 2-input NAND gate equivalents per logic tile
      • 128 x 16 2-Port SRAM per logic tile ( 2,048 bits)
    • 202,752 bytes of distributed 2-Port SRAM
    • 173 configurable digital I/O
    • Isolated 3.3V digital power and ground
  • Logic: 75,000 Gates
Processor:
  • ARM Cortex-M0 32-bit processor
  • 25MHz operation
  • 32 Kbytes of on-chip EEPROM program memory
  • 24 Kbytes of SRAM
  • Nested Vectored Interrupt Controller (NVIC)
  • Watchdog Timer
  • System and Clock Control
  • Multiple Power Saving Modes
  • Wake-Up Interrupt Controller (WIC)
  • Serial Wire Debug
  • PLL with Flexible System Clocking Options
  • High-Speed GPIO
  • APB & AHB Buses exposed to via-configurable digital section
Process: --Status: Production

TSX1001

Download PDF
ARM Cortex™-M0 PLUS Precision Mixed Signal
tsx1001 Analog Resources & I/O:
  • 16-bit Sigma-Delta ADC
  • 12-bit DAC
  • 2x Low-Noise, Single-Ended Op-Amps
  • General-Purpose, Single-Ended Op-Amp
  • 2x Wideband, Fully Differential Op-Amps
  • Precision Onboard Band-Gap Reference
  • Vdd/2 Buffered Voltage References with off-chip drivers
  • 3.3V Analog Operation
  • Isolated Analog & Digital Supplies
  • Digital Logic & I/O:
    • 16 High-Speed GPIO
    • High-Speed UART
    • SPI (master/slave)
    • PWM (processor and external enables)
    • Timer (32-bit general purpose)
  • Logic:
Processor:
  • ARM Cortex-M0 32-bit processor
  • 25MHz operation
  • 32 Kbytes of on-chip EEPROM program memory
  • 24 Kbytes of SRAM
  • Nested Vectored Interrupt Controller (NVIC)
  • Watchdog Timer
  • System and Clock Control
  • Multiple Power Saving Modes
  • Wake-Up Interrupt Controller (WIC)
  • Serial Wire Debug
  • PLL with Flexible System Clocking Options
Process: Status: