Triad Semiconductor’s via-configurable arrays (VCA) combine silicon proven analog and digital building blocks on an integrated circuit die. These building blocks are overlaid with a global routing fabric which covers the digital, memory, and analog resources throughout the VCA. Vias placed between two of the metal layers are used to interconnect and configure all of the mixed signal resources throughout the VCA.
If a design does not optimally fit on an existing VCA, TRIAD can quickly and inexpensively assemble a VCA optimized for the application out of TRIAD’s extensive IP library as shown in Figure 2.
An optimized VCA can contain exactly the resources required by a particular application including:
- Total number of logic gates
- Number of distributed RAMs
- Number of block RAMs
- Digital I/O
- Number and types of Analog IP Blocks
- Analog I/O
VCA Digital Capacity
The digital section of each VCA consists of an array of logic tiles. In TRIAD’s 0.18-micron process, each logic tile contains 2,800 NAND2 equivalent ASIC gates. The logic elements within each tile are high-performance, low-power via-configurable combinatorial gates and flip-flops. These logic tiles are arrayed to create digital logic capacities up to the values shown in Table 1. Each logic tile contains a distributed 128×32 2-Port SRAM (4096-bits). These RAMs can be combined to make larger composite RAMs.
1 – 0.18-Micron VCA Maximum Logic Array Sizes
|Maximum Number of Tiles per VCA||400|
|Maximum Array (Rows by Columns)||20 by 20|
|Total Available Logic Gates (2800 gates/tile)||1,120,000|
|Number of Distributed RAMs||400|
|Distributed RAM Configuration||128 by 32|
|Total Distributed RAM bits||1,638,400-bits (200-Kbytes)|
Block RAM Support
In addition to distributed RAMs within each logic tile, block RAMs of various sizes and configurations can be added to an optimized array. RAMs of various sizes can be generated and placed in the VCA. RAMs can be configured as 1-port or 2-port devices with varying address depths and data bus widths per RAM.