The Digital Structured ASIC is dead. LSI has pulled the plug. Synplicity is winding down their entire structured ASIC line. Articles appear, almost daily, waxing nostalgic about the rise and fall of an industry. Yet, there is a new approach to using a structured (or platform, or array) approach to ASIC design. Mixed signal via-configured arrays.
There are many reasons for the early demise of the digital structured ASIC market. A leading candidate is the market itself. The severe downturn in the economy led to depression-like times in the technology segment. ASIC starts went way down. Companies were not looking to spin a new ASIC. Most were happy to let designs grow old and age gracefully. Just as this perfect storm is forming, the push for structured ASICs takes life.
Digital ASIC companies have been trying to retain market share for years. FPGA offerings have continued to advance, taking over large segments of the ASIC market. Gate array ASICs had early success as customers were looking for cost competitive ways to convert from expensive FPGAs. The big FPGA companies, not willing to let their market erode, continued to expand their product and tools. Before long, the price advantage for conversions was gone. The FPGA-to-ASIC conversion market stagnated.
While continuing to support their core technology - cell-based ASICs - companies were looking for ways to regain market share. Enter structured ASICs. All the good stuff associated with gate array ASIC products - lower NRE, lower mask costs. None of the bad stuff associates with standard cell ASICs - long design time, significant design risk, high mask cost.
Digital Structured ASICs predefine most of the layers of an IC with pre-placed logic gates and memory. The user’s design is then configured and interconnected by customizing the last few metal layers. This simplified design and manufacturing process can yield lower cost and lowered risk. Technology size goes down, NRE goes up, ASP goes down. Overall cost, NRE + ASP is lower.
Early adopters wrote many articles predicting the potential size of the structured ASIC market. As late as 2004 it was predicted that the structured ASIC market would grow to $1.4B by 2008. Other predictions talked about a $2.5B market by 2009.
The structured digital ASIC provided a way for the ASIC guys to combat the standard product guys. With the advantages of faster time to market and a lower cost barrier, the early predictions of a robust digital structured ASIC market were understandable. Wrong, but understandable.
Mixed signal structured ASICs follow a similar technology path as their digital counterparts. Simply, they process analog and digital signals on a single chip. Until now, mixed signal ASIC design has required time consuming, expensive, and risky full-custom (manual) layout.
Using a structured approach with a mixed signal ASIC allows designers to create mixed signal ASICs using a single via layer. Full-custom layout not required.
The question is whether the downfall of the digital structured ASIC market is a leading indicator for the mixed signal structured ASIC market. If the underlying factors were the same, the answer should be the same. They are not. Here’s why:
When you lower the barrier of entry, namely NRE, you open up the ASIC possibilities to a new (and large) group of customers. Being able to prototype a device in the same technology that will be used in production is much more useful to designers than kluging together discrete digital and analog functions. Reducing risk by using IP blocks that have been silicon proven allows designers to implement functions that they know will work the first time. Reducing the time to go from design - to prototype - to production - gives companies looking to implement a mixed signal ASIC a competitive advantage.
You can buy a mixed signal FPGA. There are applications where a mixed signal FPGA will support your requirements. But, the possibility of solutions on the mixed signal side is much smaller than in the digital world. In the digital space, entire categories of ASIC devices have been eliminated by using an FPGA or ASSP. These alternatives offer no NRE, no risk and low unit price. That offering is much smaller in the mixed signal space. The mixed signal designer has fewer options from which to choose. Go the full-custom mixed signal ASIC route, meet your design requirements, integrate all the custom code and features that make your end product unique. Shoe horn your requirements into a standard product or mixed signal FPGA and loose some of the cool features that enable to sell your products at a high margin.
Or - give customers an option. The best of both worlds. Via-configured arrays. Structured mixed signal ASICs. A solution that truly fills the gap for the mixed signal ASIC designer. With history as a guide, mixed signal ASIC companies looking to provide customers with a viable solution should do just fine.
Visit Triad Semiconductor, www.triadsemi.com , for more information about Triad’s revolutionary via configurable array (VCA) technology that enables the rapid creation of low cost, low risk, rapid time to market mixed signal ASICs.